 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MC100LVEL40 3.3/5V ECL Differential Phase-Frequency Detector Description The MC100LVEL40 is a three state phase frequency-detector intended for phase-locked loop applications which require a minimum amount of phase and frequency difference at lock. Advanced design significantly reduces the dead zone of the detector. For proper operation, the input edge rate of the R and V inputs should be less than 5 ns. The device is designed to work with a 3.3 V power supply. When the reference (R) and the feedback (FB) inputs are unequal in frequency and/or phase the differential up (U) and down (D) outputs will provide pulse streams which when subtracted and integrated provide an error voltage for control of a VCO. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. For application information, refer to AND8040/D, "Phase Lock Loop Operation." The 100 Series Contains Temperature Compensation Features http://onsemi.com MARKING DIAGRAM 20 20 1 SO-20 DW SUFFIX CASE 751D 100LVEL40 AWLYYWWG 1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package * 250 MHz Typical Bandwidth * PECL Mode Operating Range: *For additional marking information, refer to Application Note AND8002/D. * NECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V VCC = 0 V with VEE = -3.0 V to -5.5 V ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. * Internal Input Pulldown Resistor * Pb-Free Packages are Available* *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (c) Semiconductor Components Industries, LLC, 2006 November, 2006 - Rev. 8 1 Publication Order Number: MC100LVEL40/D MC100LVEL40 NC VCCO 20 19 U 18 U 17 VEE 16 D 15 D 14 VCCO NC 13 12 NC 11 Table 1. PIN DESCRIPTION PIN U, U D, D FB, FB R, R VBB VCC, VCCO VEE NC FUNCTION ECL Up Differential Outputs ECL Down Differential Outputs ECL Feedback Differential Inputs ECL Reference Differential Inputs Reference Voltage Output Positive Supply Negative Supply No Connect 1 NC 2 NC 3 R 4 R 5 VBB 6 FB 7 FB 8 VCC 9 NC 10 NC Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. 20-Lead Pinout (Top View) R R VBB VEE S R Q U U D R FB FB S Q D Figure 2. Logic Diagram Table 2. ATTRIBUTES Characteristics ESD Protection Moisture Sensitivity (Note 1) SOIC-20 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34 Human Body Model Pb Pkg Level 1 Value > 2 kV Pb-Free Pkg Level 3 UL 94 V-0 @ 0.125 in 356 Devices http://onsemi.com 2 MC100LVEL40 Table 3. MAXIMUM RATINGS Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board SOIC-20 SOIC-20 SOIC-20 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI v VCC VI w VEE Condition 2 Rating 8 to 0 -8 to 0 6 to 0 -6 to 0 50 100 0.5 -40 to +85 -65 to +150 90 306 30 to 35 265 265 Unit V V V V mA mA mA C C C/W C/W C/W C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 4. LVPECL DC CHARACTERISTICS VCC = 3.3 V, VEE = 0 V (Note 2) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Note 7) Vpp < 500 mV Vpp y 500 mV Input HIGH Current Input LOW Current Others R, FB 0.5 -300 2215 1470 2135 1490 1.92 Min Typ 38 2295 1605 Max 45 2420 1745 2420 1825 2.04 2275 1490 2135 1490 1.92 Min 25C Typ 38 2345 1595 Max 47 2420 1380 2420 1825 2.04 2275 1490 2135 1490 1.92 Min 85C Typ 38 2345 1595 Max 47 2420 1680 2420 1825 2.04 Unit mA mV mV mV mV V 1.3 1.5 3.3 3.3 150 1.2 1.4 0.5 -300 3.3 3.3 150 1.2 1.4 0.5 -300 3.3 3.3 150 V V mA mA mA IIH IIL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary 0.3 V. 3. Outputs are terminated through a 50 W resistor to VCC - 2 V. 4. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. http://onsemi.com 3 MC100LVEL40 Table 5. LVNECL DC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V (Note 5) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Note 7) Vpp < 500 mV Vpp y 500 mV Input HIGH Current Input LOW Current Others R, FB 0.5 -300 -1085 -1830 -1165 -1810 -1.38 Min Typ 38 -1005 -1695 Max 45 -880 -1555 -880 -1475 -1.26 -1025 -1810 -1165 -1810 -1.38 Min 25C Typ 38 -955 -1705 Max 47 -880 -1620 -880 -1475 -1.26 -1025 -1810 -1165 -1810 -1.38 Min 85C Typ 38 -955 -1705 Max 47 -880 -1620 -880 -1475 -1.26 Unit mA mV mV mV mV V -2.0 -1.8 -0.4 -0.4 150 -2.1 -1.9 0.5 -300 -0.4 -0.4 150 -2.1 -1.9 0.5 -300 -0.4 -0.4 150 V V mA mA mA IIH IIL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary 0.3 V. 6. All loading with 50 W resistor to VCC - 2 V. 7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. Table 6. AC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V or VCC = 0 V; VEE = -3.3 V (Note 8) -40C Symbol Fmax tPLH tPHL VPP tJITTER tr, tf Characteristic Maximum Toggle Frequency Propagation Delay R to U, FB to D 430 1200 150 TBD 175 475 175 Min Typ TBD 630 1400 1000 450 1250 150 TBD 475 175 Max Min 25C Typ TBD 650 1450 1000 480 1370 150 TBD 475 Max Min 85C Typ TBD 680 1590 1000 Max Unit GHz ps mV ps ps Input Swing (Differential Configuration) (Note 9) Cycle-to-Cycle Jitter Output Rise/Fall Times NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. VEE can vary 0.3 V. 9. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. http://onsemi.com 4 MC100LVEL40 Q Driver Device Q Zo = 50 W 50 W 50 W D Zo = 50 W D Receiver Device VTT VTT = VCC - 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC10LVEL40DW MC10LVEL40DWG MC10LVEL40DWR2 MC10LVEL40DWR2G Package SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) Shipping 38 Units / Rail 38 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices http://onsemi.com 5 MC100LVEL40 PACKAGE DIMENSIONS SO-20 WB CASE 751D-05 ISSUE G D A 11 X 45 _ q NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ H M B M 20 10X 0.25 E 1 10 20X B 0.25 M B TA S h B S A e SEATING PLANE 18X A1 T C DIM A A1 B C D E e H h L q ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative L http://onsemi.com 6 MC100LVEL40/D |
Price & Availability of MC100LVEL4006
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |